Conventional devices often include first and second semiconductor chips arranged such that                the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data,        the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and        the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur.        
Such an arrangement comprises, by way of example, a microcontroller (first semiconductor chip) and power chip (second semiconductor chip), the power chip additionally being connected to electrical loads which are to be controlled.
The microcontroller executes a control program which stipulates how the electrical loads connected to the power chip need to be driven. The microcontroller does not drive the loads itself, however, but rather does so via the power chip.
In essence, the power chip does nothing other than drive the electrical loads connected to it on the basis of the stipulations received from the microcontroller.
Such arrangements are used, by way of example, when the microcontroller is not able to drive the electrical loads itself. This is the case particularly when the voltages and/or currents to be supplied to the loads are so large that the microcontroller cannot produce them itself or could produce them itself, only with an unfeasible level of complexity.
Such arrangements are used by way of example, but not exclusively, in motor vehicle control units. Motor vehicle control units have to control, inter alia, a whole series of loads by supplying power and interrupting the supply of power. In this context, most loads need to be supplied with voltages (for example 12V) and/or currents (for example 1A and above) which are so large that they cannot be produced by a microcontroller, but certainly can be produced by a power chip.
The power chip can be configured by the microcontroller and has the timing for driving the loads prescribed to it by the microcontroller.
The power chip is configured by transmitting data, subsequently referred to as pilot data, from the microcontroller to the power chip. Configuring the power chip allows a setting to be made in it regarding, by way of example, whether it is to operate in normal mode or in a special mode, for example in sleep mode.
The timing for driving the loads is prescribed by transmitting signals or data, subsequently referred to as load control data, to the power chip. The load control data used can be, by way of example, pulse-width modulated signals produced by a timer in the microcontroller.
The power chip transmits to the microcontroller status information which signals to the microcontroller the states prevailing in the power chip or events which occur. The status information is transmitted to the microcontroller by transmitting data which are subsequently referred to as diagnostic data. These diagnostic data make it possible to signal to the microcontroller that a load is drawing too much current or that there is overheating, for example.
In arrangements of the type described above, one problem is the transmission of the load control data.
Until recently, they were transmitted such that each of the loads connected to the power chip had a dedicated pulse-width modulated signal transmitted to the power chip on a dedicated line.
This type of load control data transmission is disadvantageous because the microcontroller and the power chip in this case need to be connected to one another by means of a very large number of lines and need to have a correspondingly large number of input and/or output connections.
This problem has now since been recognized and has been alleviated by developing the “microsecond bus”. The microsecond bus has the particular feature that the load control signals which were previously transmitted to the power chip in parallel are sampled at regular intervals of time, for example at 1 ps intervals of time, and that the samples are transmitted to the power chip serially via a single transmission channel. The power chip reconstructs the sampled pulse-width modulated signals from the data supplied to it and drives the loads connected to it accordingly. This makes it possible to achieve a considerable reduction in the lines which need to be provided between the microcontroller and the power chip, and the number of input and/or output connections which need to be provided on the microcontroller and on the power chip is also correspondingly smaller.
The basic design of an arrangement in which a microcontroller and a power chip are connected to one another via a microsecond bus is illustrated in FIG. 1.
FIG. 1 shows a microcontroller MC, a power chip PC and a microsecond bus MSB which connects the microcontroller and the power chip.
The microcontroller MC contains a central processing unit CPU, a timer T1, a microsecond bus controller MSC and various further units P1 to Pn, said components being connected to one another via an internal system bus SYSBUS.
The timer T1 produces pulse-width modulated signals which prescribe the timing for driving the loads and supplies these signals to the microsecond bus controller MSC via the system bus SYSBUS. In the example under consideration, the timer produces a total of 16 output signals, each of which comprises one bit, and indicates whether or not a condition which has been set in the timer and is associated with the respective timer output signal has been satisfied. The timer output signals are transmitted to the microsecond bus controller MSC at particular intervals of time, for example at 1 μs intervals of time, and the microsecond bus controller transmits these signals to the power chip PC serially via the microsecond bus MSB.
The microsecond bus MSB comprises a first transmission channel TC1 and a second transmission channel TC2, the first transmission channel TC1 comprising lines DATA1a, DATA1b, CLK1 and CS1 and the second transmission channel TC2 comprising lines DATA2, CLK2 and CS2.
Using the line CLK2, the microcontroller MC transmits a transmission clock signal to the power chip PC.
Using the line DATA2, the microcontroller MC transmits the respective current levels of the timer output signals, that is to say the load control data, to the power chip PC serially in time with the transmission clock signal transmitted via the line CLK2.
Using the line CS2, the microcontroller MC transmits to the power chip PC a chip select signal which signals to the power chip the start and end of the transmission of data intended for the power chip via the line DATA2.
Using the line CLK1, the microcontroller MC transmits a transmission clock signal to the power chip PC.
Using the line DATA1a, the microcontroller MC transmits pilot data to the power chip PC serially in time with the transmission clock signal transmitted via the line CLK1, and, synchronously therewith, the power chip PC uses the line DATA1b to transmit diagnostic data to the microcontroller serially.
Using the line CS1, the microcontroller MC transmits to the power chip PC a chip select signal which signals to the power chip the start and end of the transmission of data intended for the power chip via the line DATA1a. 
As can be seen from the explanations above, the use of the microsecond bus allows a significant reduction in the number of lines between the microcontroller MC and the power chip PC and hence also in the number of input and/or output connections on the microcontroller and on the power chip. It is now necessary to provide only 7 lines between the microcontroller MC and the power chip PC; for transmitting the timer output signals via a respective dedicated line, 16 lines would need to be provided just for transmitting the timer output signals.
Nevertheless, the use of a microsecond bus is not yet optimal.
First, it would be desirable to be able to reduce the number of lines which need to be provided between the microcontroller and the power chip even further.
Secondly, the synchronous bidirectional transmission of the pilot data and of the diagnostic data via the lines DATA1a and DATA1b is complex and problematical. In particular, above all with relatively long line lengths and the resultant long signal propagation times, it is necessary to work at a relatively low data transmission rate, which means that it can become difficult to transmit the pilot data and diagnostic data in full.
The problem just mentioned could be eliminated by using the first transmission channel TC1 to transmit only the pilot data, and by using a third transmission channel to transmit the diagnostic data. However, this would run against the desire to reduce the number of lines which need to be provided between the microcontroller and the power chip.